Tuesday, Sept. 16, 2008, 12 noon, ECSS 2.415
"From III-V MOSFETs to Neuro-Inspired Computing: Innovation in Electronic Materials
Moore’s law has provided smaller, faster and cheaper logic and memory for over 30 years. This has been driven by the ability to continue scaling the device dimensions of the complementary-metal-oxide-semiconductor (CMOS) field-effect-transistor (FET). Although considerable challenges were overcome to realize this rate of scaling, until recently very little has changed in the materials and design of the basic MOSFET. New materials (e.g., high-k gate dielectrics and III-V substrates) will likely permit continued MOSFET scaling for the near future. Although numerous non-charge-based binary device concepts (e.g., pseudo-spin devices based on graphene) are being considered to replace charge-based MOSFETs, both practical and fundamental challenges will likely prevent this. With innovation associated with conventional Moore’s Law likely to slow, fundamentally new paradigms are required. This talk will review two of my group’s current research thrusts in electronic materials and devices:
1) The development of a fundamental understanding of the relationship between chemical bonding and structure of the III-V/high-k interface to MOS electrical properties.
2) The development of materials and devices for a nanoscale CMOS-compatible silicon neuron that replicates biological neuron function as a possible foundation for future intelligent machines.