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Thursday, March 24, 2011
4 p.m., TI Auditorium
(ECSS 2.102)

 

 

 

 

 

 

 

 

 

 

 EE seminar series

“Trusted Integrated Circuits: Challenges & Opportunities Ahead”
Dr. Yiorgos Makris, Yale University

Abstract
Partly because of design outsourcing and migration of fabrication to low-cost areas across the globe, and partly because of increased reliance on third-party intellectual property and design automation software, the integrated circuit supply chain is now considered far more vulnerable to malicious modifications than ever before. Such modifications, known as hardware Trojans, provide additional functionality that is unknown to the designer and user, but which can be exploited by the perpetrator after deployment to sabotage or incapacitate a chip, or to steal sensitive information. This presentation outlines the challenges and elucidates the multidisciplinary research opportunities associated with certifying trustworthiness of integrated circuits. Solutions developed by the presenter’s research group for various instances of the problem will also be discussed. These include i) the use of side-channel information along with statistical analysis methods to detect hardware Trojans in wireless cryptographic circuits, ii) the design of on-chip neural networks for post-deployment trust monitoring, iii) a novel framework for facilitating acquisition of provably trustworthy third-party hardware intellectual property based on proof-carrying code (PCC) concepts and iv) a micro-architectural control-flow analysis approach to concurrent or a posteriori collection and analysis of workload forensics.

Bio
Yiorgos Makris received his PhD in computer engineering from the University of California, San Diego, in 2001. He then joined Yale University, where he is an associate professor of electrical engineering and computer science. His main research interests are in the application of machine learning and statistical analysis methods toward increasing the trustworthiness and robustness of electronic circuits. He is also interested in test and reliability of analog/RF circuits and modern microprocessor resiliency as well as intelligent reconfigurable computing with novel multifunctional materials and emerging technologies. His research has been supported by NSF, DARPA, SRC/TxACE, IBM, LSI, Intel and TI.